(c) 2014. renesas electronics corporation. all rights reserved. page 1 of 1 date: apr . 2, 2014 renesas technical update 1753, shimonumabe, nakahara-ku, kawasaki-shi, kanagawa 211-8668 japan renesas electronics corporation product category mpu/mcu document no. tn-sh7-a883 a/e r ev. 1.00 title correction of errors regarding the sram interface on internal bus of the bus state controller (bsc) information category technical notification applicable product ? sh7214 group ? sh7216 group lot no. reference document ? sh7214 group, sh7216 group user?s manual: hardware rev.4.00 (r01uh0230ej0400) all lots we would like to inform you of the correction of errors in the above listed user's manuals. please refer to the following for details. 9.5.8 sram interface with byte selection erroneous: 64k 16-bit this lsi sdram figure 9.41 example of connection with 16-bit data-width sram with byte selectio n corrected: 64k 16-bit this lsi sram figure 9.41 exa mple of connection with 16-bit data-width sram with byte selectio n a16 a1 csn rd rd/wr d15 d0 wrhh wrhl a15 a0 cs oe we i/o15 i/o0 ub lb a16 a1 csn rd rd/wr d15 d0 wrh wrl a15 a0 cs oe we i/o15 i/o0 ub lb
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